what llvm store instruction pattern do i need? -
im trying make llvm backend , dont know need fix error
llvm error: cannot select: t5: ch = store<st4[%retval]> t0, constant:i32<0>, frameindex:i64<0>, undef:i64
this ir im trying process
define i32 @main() #0 { %retval = alloca i32, align 4 store i32 0, i32* %retval, align 4 ret i32 0 }
but don't know dag pattern need able match it.
a tablegen file contains of instructions arch supports here https://github.com/jfmherokiller/customllvm/blob/master/llvm/lib/target/zcpu/zcpuinstr.td
i figured out issue looking @ issue wrong
store<st4[%retval]> t0, constant:i32<0>, frameindex:i64<0>, undef:i64
can expessed in function form store(constant:i32<0>,frameindex:i64<0>)
or store constant i32 0 in stack frame index 0.
the information wasnt getting frameindex:i64<0>
directly related line in targetselectiondag.td def frameindex :sdnode<"isd::frameindex",sdtptrleaf, [],"frameindexsdnode">;
so frameindex = frameindex
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