VHDL coding style and best practises reference guide -

do of know vhdl coding style guide , practises guide? sw there lot of material, vhdl don't see reference example. supposed because each maker has own synthesis tool, , code interpretation changes.

i'm looking short guide instead of large book.

thanks!

in general, quick reference guide use is

http://allaboutfpga.com/category/vhdl/ examples there have syntax , comments, it's optimized vhdl , more geared towards learning it, may or may not helpful.

if using xilinx tools, have templates included every kind of operation or situation find in. suggest familiarizing if want avoid books reuse methodology (https://www.amazon.com/reuse-methodology-manual-system-designs/dp/1402071418/ref=dp_ob_title_bk) or designers guide vhdl.

other rules of thumb understood things using std_logic's on ports, tabulating readability, registering outputs, , modularizing as possible.